IEEE - Institute of Electrical and Electronics Engineers, Inc. - A Comparison of Pipelined RAG-n and DA FPGA-based Multiplierless Filters

APCCAS 2006. 2006 IEEE Asia Pacific Conference on Circuits and Systems

Author(s): Uwe Meyer-Baese ; Jiajia Chen ; Chip Hong Chang ; A.G. Dempster
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 December 2006
Conference Location: Singapore, Singapore
Conference Date: 4 December 2006
Page(s): 1,555 - 1,558
ISBN (Paper): 1-4244-0387-1
DOI: 10.1109/APCCAS.2006.342540
Regular:

The paper starts with an overview of distributed arithmetic (DA) and n-dimensional reduced adder graph (RAG-n) multiplierless filter design methods. Since DA designs are table-based and RAG-n... View More

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