IEEE - Institute of Electrical and Electronics Engineers, Inc. - Practical Variation-Aware Interconnect Delay and Slew Analysis for Statistical Timing Verification

IEEE/ACM International Conference on Computer Aided Design - Digest of Technical Papers

Author(s): Xiaoji Ye ; Peng Li ; F. Liu
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 November 2006
Conference Location: San Jose, CA, USA
Conference Date: 5 November 2006
Page(s): 54 - 59
ISBN (CD): 1-59593-389-1
ISSN (Paper): 1092-3152
DOI: 10.1109/ICCAD.2006.320133
Regular:

Interconnects constitute a dominant source of circuit delay for modern chip designs. The variations of critical dimensions in modern VLSI technologies lead to variability in interconnect... View More

Advertisement