IEEE - Institute of Electrical and Electronics Engineers, Inc. - Simultaneous Power and Thermal Integrity Driven Via Stapling in 3D ICs

IEEE/ACM International Conference on Computer Aided Design - Digest of Technical Papers

Author(s): Hao Yu ; J. Ho ; Lei He
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 November 2006
Conference Location: San Jose, CA, USA
Conference Date: 5 November 2006
Page(s): 802 - 808
ISBN (CD): 1-59593-389-1
ISSN (Paper): 1092-3152
DOI: 10.1109/ICCAD.2006.320123
Regular:

The existing work on via-stapling in 3D integrated circuits optimizes power and thermal integrity separately and uses steady-state thermal analysis. This paper presents the first in-depth study on... View More

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