IEEE - Institute of Electrical and Electronics Engineers, Inc. - Automatic Memory Reductions for RTL Model Verification

IEEE/ACM International Conference on Computer Aided Design - Digest of Technical Papers

Author(s): P. Manoliost ; S.K. Srinivasan ; D. Vroon
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 November 2006
Conference Location: San Jose, CA, USA
Conference Date: 5 November 2006
Page(s): 786 - 793
ISBN (CD): 1-59593-389-1
ISSN (Electronic): 1558-2434
ISSN (Paper): 1092-3152
DOI: 10.1109/ICCAD.2006.320121
Regular:

We present several techniques for automatically reducing memories in RTL designs. This includes a new memory abstraction algorithm that allows us to greatly reduce the size of memories and a... View More

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