IEEE - Institute of Electrical and Electronics Engineers, Inc. - Parallel FDTD Computations Optimized by Program Macro Data Flow Graph Redeployment

International Symposium on Parallel Computing in Electrical Engineering

Author(s): A. Smyk ; M. Tudruj
Sponsor(s): IEEE CSP
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 January 2006
Conference Location: Bialystok, Poland
Conference Date: 13 September 2006
Page(s): 421 - 426
ISBN (Paper): 0-7695-2554-7
DOI: 10.1109/PARELEC.2006.58
Regular:

In this paper, we present and compare two methods for designing and profiling macro data flow graphs, which represent computation and communication patterns for the FDTD (finite difference time... View More

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