IEEE - Institute of Electrical and Electronics Engineers, Inc. - A 240ps 64b carry-lookahead adder in 90nm CMOS

2006 IEEE International Solid-State Circuits Conference. Digest of Technical Papers

Author(s): S. Kao ; R. Zlatanovici ; B. Nikolic
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 January 2006
Conference Location: San Francisco, CA, USA
Conference Date: 6 February 2006
Page Count: 10
Page(s): 1,735 - 1,744
ISBN (Paper): 1-4244-0079-1
ISSN (Paper): 0193-6530
DOI: 10.1109/ISSCC.2006.1696230
Regular:

A 64b adder with a single-execution cycle time of 250ps is fabricated in a 90nm CMOS technology. The adder is designed using an energy-delay optimization framework that can rapidly optimize... View More

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