IEEE - Institute of Electrical and Electronics Engineers, Inc. - Hierarchical bottom-up analog optimization methodology validated by a delta-sigma A/D converter design for the 802.11a/b/g standard

2006 Design Automation Conference

Author(s): T. Eeckelaert ; R. Schoofs ; G. Gielen ; M. Steyaert ; W. Sansen
Sponsor(s): SiCda
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 January 2006
Conference Location: San Francisco, CA, USA
Conference Date: 24 July 2006
Page(s): 25 - 30
ISBN (Paper): 1-59593-381-6
ISSN (Paper): 0738-100X
DOI: 10.1145/1146909.1146920
Regular:

This paper describes key points and experimental validation in the development of a bottom-up hierarchical, multi-objective evolutionary design methodology for analog blocks. The methodology is... View More

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