IEEE - Institute of Electrical and Electronics Engineers, Inc. - Quantum Memory Hierarchies: Efficient Designs to Match Available Parallelism in Quantum Computing

Proceedings. 33rd International Symposium on Computer Architecture

Author(s): D.D. Thaker ; T.S. Metodi ; A.W. Cross ; I.L. Chuang ; F.T. Chong
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 January 2006
Conference Location: Boston, MA, USA
Conference Date: 17 June 2006
Page(s): 378 - 390
ISBN (Paper): 0-7695-2608-X
ISSN (Paper): 1063-6897
DOI: 10.1109/ISCA.2006.32
Regular:

The assumption of maximum parallelism support for the successful realization of scalable quantum computers has led to homogeneous, "sea-of-qubits" architectures. The resulting architectures... View More

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