IEEE - Institute of Electrical and Electronics Engineers, Inc. - Solving thermal problems of hot chips using Voronoi diagrams

Proceedings. 19th International Conference on VLSI Design held jointly with 5th International Conference on Embedded Systems and Design

Author(s): S. Majumder ; B.B. Bhattacharya
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 January 2006
Conference Location: Hyderabad, India, India
Conference Date: 3 January 2006
ISBN (Paper): 0-7695-2502-4
ISSN (Paper): 1063-9667
DOI: 10.1109/VLSID.2006.150
Regular:

A geometric simulation based method is proposed in this paper, for fast identification of hot spots and zones on a chip. Given a set of points on the chip floor with their respective thermal... View More

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