IEEE - Institute of Electrical and Electronics Engineers, Inc. - A new device level digital simulator for simulation and functional verification of large semiconductor memories

Proceedings. 19th International Conference on VLSI Design held jointly with 5th International Conference on Embedded Systems and Design

Author(s): T.R. Dastidar ; P. Ray
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 January 2006
Conference Location: Hyderabad, India, India
Conference Date: 3 January 2006
ISBN (Paper): 0-7695-2502-4
ISSN (Paper): 1063-9667
DOI: 10.1109/VLSID.2006.19
Regular:

Increasing use of embedded memories in modern day system-on-chip (SoC) designs escalates the need for CAD tools for effective functional verification of memories. We present a new simulator called... View More

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