IEEE - Institute of Electrical and Electronics Engineers, Inc. - A ternary/quaternary CAM architecture with an NPU-side IP-address compression scheme and a dynamic re-configurable CODEC scheme for large-scale flow-table lookup

2005 IEEE International Conference on Communications

Author(s): S. Hanzawa ; T. Sakata ; K. Kajigaya ; R. Takemura ; T. Sekiguchi ; T. Kawahara
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 January 2005
Conference Location: Seoul, South Korea
Conference Date: 16 May 2005
Volume: 2
Page Count: 5
ISBN (Paper): 0-7803-8938-7
DOI: 10.1109/ICC.2005.1494508
Regular:

A new ternary/quaternary content-addressable memory (CAM) architecture using a one-hot-spot block code and two new schemes - for large-scale flow-table lookup has been developed. An NPU-side... View More

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