IEEE - Institute of Electrical and Electronics Engineers, Inc. - The multi-threaded, parity-protected 128-word register files on a dual-core Itanium/sup /spl reg//-family processor

2005 IEEE International Solid-State Circuits Conference

Author(s): E.S. Fetzer ; Lei Wang ; J. Jones
Sponsor(s): IEEE Solid-State Circuits Soc.
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 January 2005
Conference Location: San Francisco, CA, USA
Conference Date: 10 February 2005
Page Count: 3
ISBN (Paper): 0-7803-8904-2
ISSN (Paper): 0193-6530
DOI: 10.1109/ISSCC.2005.1494029
Regular:

The dual-thread 18-port 128w/spl times/82b FPU register file, and the 22-port 128w/spl times/65b integer register file of the microprocessor is described. Parity embedded into each register... View More

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