IEEE - Institute of Electrical and Electronics Engineers, Inc. - Deterministic inter-core synchronization with periodically all-in-phase clocking for low-power multi-core SoCs

2005 IEEE International Solid-State Circuits Conference

Author(s): K. Nose ; A. Shibayama ; H. Kodama ; M. Mizuno ; M. Edahiro ; N. Nishi
Sponsor(s): IEEE Solid-State Circuits Soc.
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 January 2005
Conference Location: San Francisco, CA, USA
Conference Date: 10 February 2005
Page Count: 3
ISBN (Paper): 0-7803-8904-2
ISSN (Paper): 0193-6530
DOI: 10.1109/ISSCC.2005.1493986
Regular:

Periodically all-in-phase clocking (8-step frequency increments with a 4.5 ns switching time) and deterministic synchronous bus wrappers (synchronized data transfer among different frequency... View More

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