IEEE - Institute of Electrical and Electronics Engineers, Inc. - A 66dB DR 1.2V 1.2mW single-amplifier double-sampling 2/sup nd/-order /spl Delta//spl Sigma/ ADC for WCDMA in 90nm CMOS

2005 IEEE International Solid-State Circuits Conference

Author(s): Jinseok Koh ; Yunyoung Choi ; G. Gomez
Sponsor(s): IEEE Solid-State Circuits Soc.
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 January 2005
Conference Location: San Francisco, CA, USA
Conference Date: 10 February 2005
Page Count: 3
ISBN (Paper): 0-7803-8904-2
ISSN (Paper): 0193-6530
DOI: 10.1109/ISSCC.2005.1493923
Regular:

A single-amplifier double-sampling second-order /spl Delta//spl Sigma/ ADC with 5-level quantization is implemented in 90nm CMOS. To alleviate the capacitor mismatch issues in double sampling... View More

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