IEEE - Institute of Electrical and Electronics Engineers, Inc. - Circuit techniques for a 40Gb/s transmitter in 0.13/spl mu/m CMOS

2005 IEEE International Solid-State Circuits Conference

Author(s): Jaeha Kim ; Jeong-Kyoum Kim ; Bong-Joon Lee ; Moon-Sang Hwang ; Hyung-Rok Lee ; Sang-Hyun Lee ; Namhoon Kim ; Deog-Kyoon Jeong ; Wonchan Kim
Sponsor(s): IEEE Solid-State Circuits Soc.
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 January 2005
Conference Location: San Francisco, CA, USA
Conference Date: 10 February 2005
Page Count: 3
ISBN (Paper): 0-7803-8904-2
ISSN (Paper): 0193-6530
DOI: 10.1109/ISSCC.2005.1493913
Regular:

Implemented in 0.13/spl mu/m CMOS, the 40Gb/s transmitter uses shunt-and-double-series inductive peaking and negative feedback for bandwidth enhancement and pulsed latch-based dividers and... View More

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