IEEE - Institute of Electrical and Electronics Engineers, Inc. - Balancing system level pipelines with stage voltage scaling

Proceedings. IEEE Computer Society Annual Symposium on VLSI

Author(s): Hui Guo ; Sri Parameswaran
Sponsor(s): IEEE Comput. Soc. Tech. Comm. on VLSI
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 January 2005
Conference Location: Tampa, FL, USA
Conference Date: 11 May 2005
Page(s): 287 - 289
ISBN (Paper): 0-7695-2365-X
DOI: 10.1109/ISVLSI.2005.20
Regular:

This paper presents an approach to dynamically balance the pipeline by scaling the stage supply voltages. Simulation results show that by such an approach about 50% improvement in throughput and... View More

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