IEEE - Institute of Electrical and Electronics Engineers, Inc. - Pipelined memory controllers for DSP applications handling unpredictable data accesses

Proceedings. IEEE Computer Society Annual Symposium on VLSI

Author(s): B. Le Gal ; E. Casseau ; S. Huet ; E. Martin
Sponsor(s): IEEE Comput. Soc. Tech. Comm. on VLSI
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 January 2005
Conference Location: Tampa, FL, USA
Conference Date: 11 May 2005
Page(s): 268 - 269
ISBN (Paper): 0-7695-2365-X
DOI: 10.1109/ISVLSI.2005.56
Regular:

Multimedia applications are often characterized by a large number of data accesses with regular and periodic access patterns. In these cases, optimized pipelined memory access controllers can be... View More

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