IEEE - Institute of Electrical and Electronics Engineers, Inc. - RAMS: a VHDL-AMS code refactoring tool supporting high level analog synthesis

Proceedings. IEEE Computer Society Annual Symposium on VLSI

Author(s): Kaiping Zeng ; S.A. Huss
Sponsor(s): IEEE Comput. Soc. Tech. Comm. on VLSI
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 January 2005
Conference Location: Tampa, FL, USA
Conference Date: 11 May 2005
Page(s): 266 - 267
ISBN (Paper): 0-7695-2365-X
DOI: 10.1109/ISVLSI.2005.60
Regular:

In this paper, a code refactoring methodology for the high-level analog synthesis is presented. It restructures, refines, and simplifies an analog behavioral model written in VHDL-AMS. Through... View More

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