IEEE - Institute of Electrical and Electronics Engineers, Inc. - Design of a DLL-gated 1.25G clock synthesizer for impulse UWB system

2005 6th International Conference on ASIC Proceedings

Author(s): Chen Chen ; Boan Liu
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 January 2005
Conference Location: Shanghai, China
Conference Date: 24 October 2005
Volume: 2
Page(s): 591 - 594
ISBN (Paper): 0-7803-9210-8
DOI: 10.1109/ICASIC.2005.1611399
Regular:

This paper present a delay-locked loop (DLL) based 1.25GHz CMOS clock synthesizer for impulse ultrawideband (UWB) wireless communication system. Two DLLs are applied in the synthesizer that... View More

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