IEEE - Institute of Electrical and Electronics Engineers, Inc. - A VLSI architecture for motion compensation interpolation in H.264/AVC

2005 6th International Conference on ASIC Proceedings

Author(s): Yang Song ; Zhenyu Liu ; S. Goto ; T. Ikenaga
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 January 2005
Conference Location: Shanghai, China
Conference Date: 24 October 2005
Volume: 1
Page(s): 279 - 282
ISBN (Paper): 0-7803-9210-8
DOI: 10.1109/ICASIC.2005.1611300
Regular:

A VLSI architecture for motion estimation/compensation interpolation in H.264/AVC is presented in this paper. Compared with previous work, this architecture has following characteristics:... View More

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