IEEE - Institute of Electrical and Electronics Engineers, Inc. - Design of low-power double-edge triggered flip-flop

2005 6th International Conference on ASIC Proceedings

Author(s): Yu Chien-Cheng ; Chin Ping-Yuan
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 January 2005
Conference Location: Shanghai, China
Conference Date: 24 October 2005
Volume: 1
Page(s): 51 - 52
ISBN (Paper): 0-7803-9210-8
DOI: 10.1109/ICASIC.2005.1611266
Regular:

A flip-flop is a bistable circuit which stores a selected logical state in response to a clock pulse and one or more data input signals. To reduce the complexity of circuit design, a large... View More

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