IEEE - Institute of Electrical and Electronics Engineers, Inc. - Lithography-aware physical design

2005 6th International Conference on ASIC Proceedings

Author(s): D.Z. Pan
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 January 2005
Conference Location: Shanghai, China
Conference Date: 24 October 2005
Volume: 1
Page(s): 1,172 - 1,173
ISBN (Paper): 0-7803-9210-8
DOI: 10.1109/ICASIC.2005.1611242
Regular:

Nanometer VLSI design is greatly challenged by the lithography limitations. Existing approaches in design for manufacturability (DFM) are mostly done post design, such as mask data preparation... View More

Advertisement