IEEE - Institute of Electrical and Electronics Engineers, Inc. - Design of high performance PFETs with strained si channel and laser anneal

International Electron Devices Meeting 2005

Author(s): Z. Luo ; Y.F. Chong ; J. Kim ; N. Rovedo ; B. Greene ; S. Panda ; T. Sato ; J. Holt ; D. Chidambarrao ; J. Li ; R. Davis ; A. Madan ; A. Turansky ; O. Gluschenkov ; R. Lindsay ; A. Ajmera ; J. Lee ; S. Mishra ; R. Amos ; D. Schepis ; H. Ng ; K. Rim
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 January 2005
Conference Location: Washington, DC, USA
Conference Date: 5 December 2005
Page Count: 4
Page(s): 489 - 492
ISBN (Paper): 0-7803-9268-X
DOI: 10.1109/IEDM.2005.1609388
Regular:

The effects of the integration of two major PFET performance enhancers, embedded SiGe (e-SiGe) junctions and compressively stressed nitride liner (CSL) have been examined systematically. The... View More

Advertisement