IEEE - Institute of Electrical and Electronics Engineers, Inc. - An Effective IP Reuse Methodology for Quality System-on-Chip Design

2005 International Symposium on System-on-Chip

Author(s): Soujanna Sarkar ; Sanjay Shinde ; Subash Chandar G.
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 January 2005
Conference Location: Tampere, Finland
Conference Date: 17 November 2005
Page(s): 104 - 107
ISBN (Paper): 0-7803-9294-9
DOI: 10.1109/ISSOC.2005.1595655
Regular:

Intellectual property (IP) reuse improves system-on-a-chip (SoC) design productivity, and helps to meet design quality and time-to-market goals. However, IP quality issues in terms of inadequate... View More

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