IEEE - Institute of Electrical and Electronics Engineers, Inc. - Resist LER and LWR transfer during plasma etching processes for node 45 nm and beyond

Digest of Papers Microprocesses and Nanotechnology 2005. 2005 International Microprocesses and Nanotechnology Conference

Author(s): J. Foucher ; J. Thiault
Sponsor(s): Japan Soc. of Appl. Phys
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 January 2005
Conference Location: Tokyo, Japan, Japan
Conference Date: 25 October 2005
Page(s): 16 - 17
ISBN (Paper): 4-9902472-2-1
DOI: 10.1109/IMNC.2005.203715
Regular:

As critical dimensions (CD) for semiconductor devices shrink to few tens of nanometers, the line edge roughness (LER) or line width roughness (LWR) becomes a critical issue because it can degrade... View More

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