IEEE - Institute of Electrical and Electronics Engineers, Inc. - Optimal V/sub th/ assignment and buffer insertion for simultaneous leakage and glitch minimization though integer linear programming (ILP)

2005 48th IEEE International Midwest Symposium on Circuits and Systems

Author(s): P. Elakkumanan ; K. Thyagarajan ; K. Prasad ; R. Sridhar
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 January 2005
Conference Location: Covington, KY, USA
Conference Date: 7 August 2005
Page Count: 4
ISBN (Paper): 0-7803-9197-7
DOI: 10.1109/MWSCAS.2005.1594491
Regular:

This paper addresses the problem of minimizing both leakage and glitch power by appropriately using dual-V/sub th/ and buffer insertion (for path balancing) techniques, respectively. The problem... View More

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