IEEE - Institute of Electrical and Electronics Engineers, Inc. - A system-on-chip vector multiprocessor for transmission line modelling acceleration

2005 IEEE Workshop on Signal Processing Systems-Design and Implementation

Author(s): V.A. Chouliaras ; J.A. Flint ; Yibin Li ; J.L. Nunez-Yanez
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 January 2005
Conference Location: Athens, Greece, Greece
Conference Date: 2 November 2005
Page Count: 5
Page(s): 568 - 572
ISBN (Paper): 0-7803-9333-3
ISSN (Paper): 1520-6130
DOI: 10.1109/SIPS.2005.1579931
Regular:

We discuss a configurable, system-on-chip vector multiprocessor for accelerating the transmission line modeling (TLM) algorithm with an architecture capable of exploiting the two primary forms of... View More

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