IEEE - Institute of Electrical and Electronics Engineers, Inc. - Design methodology for runtime reconfigurable FPGA: from high level specification down to implementation

2005 IEEE Workshop on Signal Processing Systems-Design and Implementation

Author(s): F. Berthelot ; F. Nouvel ; D. Houzet
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 January 2005
Conference Location: Athens, Greece, Greece
Conference Date: 2 November 2005
Page Count: 6
Page(s): 497 - 502
ISBN (Paper): 0-7803-9333-3
ISSN (Paper): 1520-6130
DOI: 10.1109/SIPS.2005.1579919
Regular:

In this paper we present an automatic design generation methodology for heterogeneous architectures composed of processors, DSPs and FPGAs. This methodology is based on an adequation algorithm... View More

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