IEEE - Institute of Electrical and Electronics Engineers, Inc. - Atomistic 3D process/device simulation considering gate line-edge roughness and poly-Si random crystal orientation effects [MOSFETs]

IEEE International Electron Devices Meeting 2003

Author(s): M. Hane ; T. Ikezawa ; T. Ezaki
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 January 2003
Conference Location: Washington, DC, USA, USA
Conference Date: 8 December 2003
Page Count: 4
ISBN (Paper): 0-7803-7872-5
DOI: 10.1109/IEDM.2003.1269263
Regular:

Using newly developed simulation tools for the precise design of sub-100 nm MOSFETs, intrinsic statistical fluctuations in device characteristics were examined. Ion implantation and subsequent... View More

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