IEEE - Institute of Electrical and Electronics Engineers, Inc. - Influence of gate internal impedance on losses in a power MOS transistor switching at a high frequency in the ZVS mode

Proceedings of the 2000 Power Electronics Specialist Conference

Author(s): Lefebvre, S. ; Costa, F. ; Miserey, F.
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 January 2000
Conference Location: Galway, Ireland, Ireland
Conference Date: 23 June 2000
Volume: 3
ISBN (Paper): 0-7803-5692-6
ISSN (Paper): 0275-9306
DOI: 10.1109/PESC.2000.880545
Regular:

In order to use a power MOS transistor in the ZVS mode at high switching frequencies, the output capacitance has to be maximal and the input capacitance minimal. These characteristics available in... View More

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