IEEE - Institute of Electrical and Electronics Engineers, Inc. - A novel procedure to evaluate design scalability based on device performance linked to photolithography data

Digest of Papers Microprocesses and Nanotechnology 2000. 2000 International Microprocesses and Nanotechnology Conference

Author(s): Karklin, L. ; Balasinski, A. ; Axelrad, V.
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 January 2000
Conference Location: Tokyo, Japan, Japan
Conference Date: 11 July 2000
Page(s): 10 - 11
ISBN (Paper): 4-89114-004-6
DOI: 10.1109/IMNC.2000.872599
Regular:

We propose a novel procedure to evaluate design manufacturability based on simulated photoresist patterns followed by extraction of MOSFET geometry and VT distribution. We demonstrate the... View More

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