IEEE - Institute of Electrical and Electronics Engineers, Inc. - Memory access scheduling

Proceedings of 27th International Symposium on Computer Architecture

Author(s): S. Rixner ; W.J. Dally ; U.J. Kapasi ; P. Mattson ; J.D. Owens
Sponsor(s): IEEE Comput. Soc. Tech. Committee on Comput. Archit.
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 January 2000
Conference Location: Vancouver, BC, Canada, Canada
Conference Date: 14 June 2000
Page Count: 11
Page(s): 128 - 138
ISBN (Paper): 1-58113-232-8
ISSN (Paper): 1063-6897
DOI: 10.1145/339647.339668
Regular:

The bandwidth and latency of a memory system are strongly dependent on the manner in which accesses interact with the "3-D" structure of banks, rows, and columns characteristic of contemporary... View More

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