IEEE - Institute of Electrical and Electronics Engineers, Inc. - Trace preconstruction

Proceedings of 27th International Symposium on Computer Architecture

Author(s): Jacobson, Q. ; Smith, J.E.
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 January 2000
Conference Location: Vancouver, BC, Canada
Conference Date: 14 June 2000
Page(s): 37 - 46
ISBN (Paper): 1-58113-232-8
ISSN (Paper): 1063-6897
Regular:

Trace caches enable high bandwidth, low latency instruction supply, but have a high miss penalty and relatively large working sets. Consequently, their performance may suffer due to capacity and... View More

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