IEEE - Institute of Electrical and Electronics Engineers, Inc. - Dual damascene architectures evaluation for the 0.18 /spl mu/m technology and below

Proceedings of the IEEE 2000 International Interconnect Technology Conference

Author(s): Verove, C. ; Descouts, B. ; Gayet, P. ; Guillermet, M. ; Sabouret, E. ; Spinelli, E. ; Van der Vegt, E.
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 January 2000
Conference Location: Burlingame, CA, USA
Conference Date: 7 June 2000
Page(s): 267 - 269
ISBN (Paper): 0-7803-6327-2
DOI: 10.1109/IITC.2000.854344
Regular:

This paper compares three different schemes to pattern dual damascene (DD) structures. The Self Aligned (SA), Via First (VF), and Trench First (TF) architectures are compared in terms of... View More

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