IEEE - Institute of Electrical and Electronics Engineers, Inc. - An analysis of interface delamination in flip-chip packages

2000 Proceedings. 50th Electronic Components and Technology Conference

Author(s): Mercado, L.L. ; Sarihan, V. ; Hauck, T.
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 January 2000
Conference Location: Las Vegas, NV, USA, USA
Conference Date: 21 May 2000
Page(s): 1,332 - 1,337
ISBN (Paper): 0-7803-5908-9
DOI: 10.1109/ECTC.2000.853350
Regular:

Interface delamination is an important failure mode for flip-chip PBGA (plastic ball grid array) packages. It plays a significant role on package performance and reliability. In this paper, a... View More

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