IEEE - Institute of Electrical and Electronics Engineers, Inc. - Noise verification across 3 levels of packaging hierarchy for the IBM G5/G6 mainframes

2000 Proceedings. 50th Electronic Components and Technology Conference

Author(s): Smith, H. ; Kuppinger, S. ; Venkatachalam, P. ; Becker, W.
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 January 2000
Conference Location: Las Vegas, NV, USA, USA
Conference Date: 21 May 2000
Page(s): 754 - 759
ISBN (Paper): 0-7803-5908-9
DOI: 10.1109/ECTC.2000.853244
Regular:

This paper describes the noise verification process across three levels of packaging for the IBM S/390 G5/G6 system. With over 11,000 critical nets in the system the design philosophy is founded... View More

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