IEEE - Institute of Electrical and Electronics Engineers, Inc. - Study of a new structured leadframe based CSP, Mini-LOC

2000 Proceedings. 50th Electronic Components and Technology Conference

Author(s): Jui-Meng Jao ; Tzong Dar Her ; Chien Ping Huang ; Ko, E. ; Calub, G. ; Lo, R.H.Y.
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 January 2000
Conference Location: Las Vegas, NV, USA, USA
Conference Date: 21 May 2000
Page(s): 364 - 369
ISBN (Paper): 0-7803-5908-9
DOI: 10.1109/ECTC.2000.853178
Regular:

A new CSP (chip scale package) package named Mini-LOC (lead on chip), mainly applied on DRAM, is developed by SPIL to offer a leadframe based CSP package with lower cost, enhanced thermal and... View More

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