IEEE - Institute of Electrical and Electronics Engineers, Inc. - Optimized sample planning for wafer defect inspection

1999 IEEE International Symposium on Semiconductor Manufacturing Conference Proceedings

Author(s): Williams, R. ; Gudmundsson, D. ; Monahan, K. ; Shanthikumar, J.G.
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 January 1999
Conference Location: Santa Clara, CA, USA, USA
Conference Date: 11 October 1999
Page(s): 43 - 46
ISBN (Paper): 0-7803-5403-6
ISSN (Paper): 1523-553X
DOI: 10.1109/ISSM.1999.808734
Regular:

Increasing fab construction costs, shortening product life cycles, and eroding market prices have become critical realities for today's semiconductor manufacturers. Consequently, many... View More

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