IEEE - Institute of Electrical and Electronics Engineers, Inc. - Power macro-models for DSP blocks with application to high-level synthesis

Proceedings. 1999 International Symposium on Low Power Electronics and Design

Author(s): S. Gupta ; F.N. Najm
Sponsor(s): ACM/SIGDA
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 January 1999
Conference Location: San Diego, CA, USA, USA
Conference Date: 17 August 1999
Page Count: 3
Page(s): 103 - 105
ISBN (Paper): 1-58113-133-X
DOI: 10.1145/313817.313879
Regular:

In this paper, we propose a modeling approach for the average power consumption of macro-blocks that are typically used in digital signal processing (DSP) systems, such as adders, multipliers and... View More

Advertisement