IEEE - Institute of Electrical and Electronics Engineers, Inc. - A 1.0 ns access 770 MHz 36 Kb SRAM macro

1999 Symposium on VLSI Circuits. Digest of Technical Papers

Author(s): T. Uetake ; Y. Maki ; T. Nakadai ; K. Yoshida ; M. Susuki ; R. Nanjo
Sponsor(s): Japan Soc. Appl. Phys.
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 January 1999
Conference Location: Kyoto, Japan, Japan
Conference Date: 17 June 1999
Page Count: 2
Page(s): 109 - 110
ISBN (Paper): 4-930813-95-6
DOI: 10.1109/VLSIC.1999.797253
Regular:

Summary form only given. A 1.0 ns access, 770 MHz, 36 Kb SRAM macro using a 0.18 /spl mu/m CMOS low cost ASIC technology was developed. Key technologies used to achieve this high performance are... View More

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