IEEE - Institute of Electrical and Electronics Engineers, Inc. - An 8 b 500 MS/s full Nyquist cascade A/D converter

1999 Symposium on VLSI Circuits. Digest of Technical Papers

Author(s): K. Irie ; N. Kusayanagi ; T. Kawachi ; T. Nishibu ; Y. Matsumori
Sponsor(s): Japan Soc. Appl. Phys.
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 January 1999
Conference Location: Kyoto, Japan, Japan
Conference Date: 17 June 1999
Page Count: 2
Page(s): 77 - 78
ISBN (Paper): 4-930813-95-6
DOI: 10.1109/VLSIC.1999.797241
Regular:

An 8 b 500 MS/s one-bit-per-stage cascade A/D converter (ADC) has been developed. We achieved 500 MHz one-clock conversion of all the cascade stages with a novel error suppression technique. The... View More

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