IEEE - Institute of Electrical and Electronics Engineers, Inc. - Transistor design issues in integrating analog functions with high performance digital CMOS

1999 Symposium on VLSI Technology. Digest of Technical Papers

Author(s): A. Chatterjee ; K. Vasanth ; D.T. Grider ; M. Nandakumar ; G. Pollack ; R. Aggarwal ; M. Rodder ; H. Shichijo
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 January 1999
Conference Location: Kyoto, Japan, Japan
Conference Date: 14 June 1999
Page Count: 2
Page(s): 147 - 148
ISBN (Paper): 4-930813-93-X
DOI: 10.1109/VLSIT.1999.799386
Regular:

Pocket or halo designs used in high performance digital CMOS design can degrade analog device performance. A new understanding of this phenomenon is presented using device simulation. The effect... View More

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