IEEE - Institute of Electrical and Electronics Engineers, Inc. - New optimization guidelines for sub-0.1 /spl mu/m CMOS technologies with 2 nm NO gate oxynitrides

1999 Symposium on VLSI Technology. Digest of Technical Papers

Author(s): M. Fujiwara ; M. Takayanagi ; Y. Toyoshima
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 January 1999
Conference Location: Kyoto, Japan, Japan
Conference Date: 14 June 1999
Page Count: 2
Page(s): 121 - 122
ISBN (Paper): 4-930813-93-X
DOI: 10.1109/VLSIT.1999.799373
Regular:

This paper reports the issues and limitations in CMOSFET characteristics with 2 nm NO oxynitrides through investigation of the nitrogen concentration dependence on the device parameters. It is... View More

Advertisement