IEEE - Institute of Electrical and Electronics Engineers, Inc. - A 0.18 /spl mu/m high-performance logic technology

1999 Symposium on VLSI Technology. Digest of Technical Papers

Author(s): S. Crowder ; S. Greco ; H. Ng ; E. Barth ; K. Beyer ; G. Biery ; J. Connolly ; C. DeWan ; R. Ferguson ; X. Chen ; M. Hargrove ; E. Nowak ; P. McLaughlin ; R. Purtell ; R. Logan ; J. Oberschmidt ; A. Ray ; D. Ryan ; K. Tallman ; T. Wagner ; V. McGahay ; E. Crabbe ; P. Agnello ; R. Goldblatt ; L. Su ; B. Davari
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 January 1999
Conference Location: Kyoto, Japan, Japan
Conference Date: 14 June 1999
Page Count: 2
Page(s): 105 - 106
ISBN (Paper): 4-930813-93-X
DOI: 10.1109/VLSIT.1999.799362
Regular:

In this paper, we describe a high-performance 0.18 /spl mu/m logic technology with dual damascene copper metallization and dense SRAM memory. Local interconnect technology allows us to fabricate... View More

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