IEEE - Institute of Electrical and Electronics Engineers, Inc. - Inner cylinder Ta/sub 2/O/sub 5/ capacitor process for 1 Gb DRAM and beyond

1999 Symposium on VLSI Technology. Digest of Technical Papers

Author(s): Seok Jun Won ; Yong Woo Hyung ; Kab Jin Nam ; Young Dae Kim ; Ki Yeon Park ; Young Wook Park ; Sang In Lee ; Moon Young Lee
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 January 1999
Conference Location: Kyoto, Japan, Japan
Conference Date: 14 June 1999
Page Count: 2
Page(s): 97 - 98
ISBN (Paper): 4-930813-93-X
DOI: 10.1109/VLSIT.1999.799358
Regular:

Capacitor manufacturing technology for 0.13 /spl mu/m design rule 1 Gbit DRAMs has been developed using an improved MIS (metal-insulator-semiconductor) tantalum oxide capacitor module... View More

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