IEEE - Institute of Electrical and Electronics Engineers, Inc. - Substrate enhanced gate current: device design and temperature impact and disturbs in programming flash memories with negative body bias

1999 Symposium on VLSI Technology. Digest of Technical Papers

Author(s): R. Annunziata ; T. Ghilardi ; M. Tosi
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 January 1999
Conference Location: Kyoto, Japan, Japan
Conference Date: 14 June 1999
Page Count: 2
Page(s): 83 - 84
ISBN (Paper): 4-930813-93-X
DOI: 10.1109/VLSIT.1999.799351
Regular:

Substrate negative polarization enhances gate current in submicron MOSFETs, improving two different hot carrier mechanisms (Esseni et al., 1998): CHEI (channel hot electron injection) and CISEI... View More

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