IEEE - Institute of Electrical and Electronics Engineers, Inc. - Channel engineering for high speed sub-1.0 V power supply deep sub-micron CMOS

1999 Symposium on VLSI Technology. Digest of Technical Papers

Author(s): Baohong Cheng ; A. Inani ; R. Rao ; J.C.S. Woo
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 January 1999
Conference Location: Kyoto, Japan, Japan
Conference Date: 14 June 1999
Page Count: 2
Page(s): 69 - 70
ISBN (Paper): 4-930813-93-X
DOI: 10.1109/VLSIT.1999.799344
Regular:

The effects of channel engineering on device performance have been extensively investigated. The lateral asymmetric channel (LAC) MOSFETs show significantly higher I/sub dsat/ and g/sub msat/,... View More

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