IEEE - Institute of Electrical and Electronics Engineers, Inc. - High performance fully and partially depleted poly-Si surrounding gate transistors

1999 Symposium on VLSI Technology. Digest of Technical Papers

Author(s): Hyun-Jin Cho ; J.D. Plummer
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 January 1999
Conference Location: Kyoto, Japan, Japan
Conference Date: 14 June 1999
Page Count: 2
Page(s): 31 - 32
ISBN (Paper): 4-930813-93-X
DOI: 10.1109/VLSIT.1999.799325
Regular:

High performance poly-Si surrounding gate transistors have been demonstrated. A mobility of 567 cm/sup 2//V-s and a high I/sub on//I/sub off/ ratio of 1.6/spl times/10/sup 9/ were achieved. To our... View More

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