IEEE - Institute of Electrical and Electronics Engineers, Inc. - A 0.22 /spl mu/m CMOS-SOI technology with a Cu BEOL

1999 Symposium on VLSI Technology. Digest of Technical Papers

Author(s): A. Ajmera ; J.W. Sleight ; F. Assaderaghi ; R. Bolam ; A. Bryant ; M. Coffey ; H. Hovel ; J. Lasky ; E. Leobandung ; W. Rausch ; D. Sadana ; D. Schepis ; L.F. Wagner ; K. Wu ; B. Davari ; G. Shahidi
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 January 1999
Conference Location: Kyoto, Japan, Japan
Conference Date: 14 June 1999
Page Count: 2
Page(s): 15 - 16
ISBN (Paper): 4-930813-93-X
DOI: 10.1109/VLSIT.1999.799317
Regular:

A 0.22 /spl mu/m CMOS on SOI technology, using a nonfully depleted device, is developed. This technology uses the same gate lithography and metallization as a comparable bulk technology, but... View More

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