IEEE - Institute of Electrical and Electronics Engineers, Inc. - Unbalanced cache systems

1999 IEEE International Workshop on Memory Technology, Design and Testing

Author(s): Rhodes, D.L. ; Wolf, W.
Publisher: IEEE - Institute of Electrical and Electronics Engineers, Inc.
Publication Date: 1 January 1999
Conference Location: San Jose, CA, USA, USA
Conference Date: 9 August 1999
Page(s): 16 - 23
ISBN (Paper): 0-7695-0259-8
ISSN (Paper): 1087-4852
DOI: 10.1109/MTDT.1999.782679
Regular:

The new concept of an unbalanced, hierarchically-divided cache memory system is introduced and analyzed. This approach generalizes existing cache structures by allowing different memory... View More

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